1. Field of the Invention
The present invention relates to a method of exposing a pattern image of a reticle or pattern images of a plurality of reticles on a photosensitive substrate by joining them successively.
2. Related Background Art
In manufacturing semiconductor devices, liquid crystal display devices, thin film magnetic heads or the like under a photolithography process, there us used a projecting optical apparatus (stepper, aligner and the like) which projects an image of a pattern on a photomask or a reticle (hereinafter simply called the reticle) onto a photosensitive substrate via a projection optical system. In the projecting optical apparatus, the maximum exposure field of the projection optical system has a circular exposure area, as shown in FIG. 8A. Accordingly, the size of a chip pattern to be exposed on the photosensitive substrate at a time is equal to that of a rectangular shot area 2 inscribed in the maximum exposure field 1.
Therefore, when exposing a chip pattern larger than the shot area 2 on the photosensitive substrate, it is necessary to expose a pattern formed on a reticle repeatedly or patterns formed on a plurality of reticles on the photosensitive substrate such that adjacent pattern images on the substrate are joined so as to be integrated.
In FIG. 8B showing a conventional exposure procedure in such a joining method, a pattern of a first reticle is first exposed on a first shot area S1 on a wafer coated with a photosensitive material as a photosensitive substrate. Then, after a wafer stage with the wafer disposed thereon is driven to position a second shot area S2 adjacent to the first shot area S1 in an exposure field of a projection optical system, the pattern of the first reticle or a pattern of a second reticle changed with the first reticle is exposed on the second shot area S2.
Thereafter, pattern of reticles are exposed on third, fourth, . . . and ninth shot areas S3, S4, . . . and S9 adjacent to the respective preceding shot areas successively by the step and repeat system. As a result, a chip pattern having a large area is exposed on the exposure area consisting of the shot areas S1 to S9 of 3 lines.times.3 rows on the wafer.
In the above-mentioned conventional method, a large chip pattern is exposed by joining the pattern images of a plurality of shot areas. Accordingly, it is necessary to maintain the overlapping accuracy (joining accuracy) of adjacent pattern images at joining portions between each shot area to a high degree. However, when performing an exposure on and after the second shot area, there is no other way to raise the overlapping accuracy than raising stepping and rotation accuracy.
Then, if the sufficient stepping and rotation accuracy cannot be obtained, the overlapping accuracy is deteriorated, so that there is a danger that a finished large chip does not operate normally.
FIG. 8C shows an enlarged diagram of a boundary area A of the shot areas S6 and S7 in FIG. 8B. A circuit pattern image 3 on the shot area S6 and a circuit pattern image 4 on the shot area S7 are overlapped by a width .DELTA.L, and hatched portions are a joining potion 5. There occur, positioning errors .DELTA.x and .DELTA.y in two orthogonal directions between the shot areas S6 and S7 due to the relative stepping positioning and rotation errors of the shot area S7 relative to the shot area S6. When these positioning errors .DELTA.x and .DELTA.y exceed allowable values, the joining portion 5 becomes too narrow and the chip fails to operate properly.
In order to avoid the failure at the joining portion, it is conceivable to enlarge the area of the joining portion. However, in that case, it is impossible to form circuit patterns minutely.